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 A6800/A6801
DABiC-5 Latched Sink Drivers
The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (`D' type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN Darlingtons. This merged technology provides versatile, flexible interface. These BiMOS power interface ICs greatly benefit the simplification of computer or microprocessor I/O. The A6800 ICs each contain four latched drivers. A6801 ICs contain eight latched drivers. The CMOS inputs are compatible with standard CMOS circuits. TTL circuits may mandate the addition of input pull-up resistors. The bipolar Darlington outputs are suitable for directly driving many peripheral/ power loads: relays, lamps, solenoids, small dc motors, etc. All devices have open-collector outputs and integral diodes for inductive load transient suppression. The output transistors are capable of sinking 600 mA and will withstand at least 50 V in the OFF state. Because of limitations on package power dissipation, the simultaneous operation of all drivers at maximum rated current can only be accomplished by a reduction in duty cycle. Outputs may be paralleled for higher load current capability. The A6800SA is furnished in a standard 14-pin DIP; the A6800SL and A6801SLW in surface-mountable SOICs; the A6801SA in a 22-pin DIP with 0.400" (10.16 mm) row centers; the A6801SEP in a 28-lead PLCC. These devices are lead (Pb) free, with 100% matte tin plated leadframes.
Datasheet 26180.110
A6800SA
A6800SL
A6801SA
A6801SEP
A6801SLW
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE ............................................50 V Supply Voltage, VDD .............................................7 V Input Voltage Range, VIN ..............-0.3 V to VDD +0.3 V Continuous Collector Current, IC........................ 600 mA Package Power Dissipation, PD, see Allowable Power Disspation chart, page 5 Operating Temperature Range Ambient Temperature, TA ............-20C to +85C Storage Temperature, TS ..........-55C to +150C
FEATURES
3.3 V to 5 V logic supply range To 10 MHz data input rate High-voltage, high-current outputs Darlington current-sink outputs, with improved low-saturation voltages CMOS, TTL compatible inputs Output transient protection Internal pull-down resistors Low-power CMOS latches
APPLICATIONS
Relays Lamps Part Number Pins 14 14 22 28 24 Solenoids Small dc motors Package DIP SOIC DIP PLCC SOIC
Use the following complete part numbers when ordering:
A6800SA-T A6800SL-T A6801SA-T A6801SEP-T A6801SLW-T
Caution: CMOS devices have input-static protection, but are susceptible to damage when exposed to extremely high static-electrical charges.
DABiC-5 Latched Sink Drivers
Functional Block Diagram
S UP P LY V DD IN N OUT N C OMMON
A6800/A6801
Datasheet 26180.110
S T R OB E G R OUND C LE AR OUT P UT E NAB LE
T Y P IC AL MOS LAT C H
T Y P IC AL B IP OLAR DR IV E
C OMMON MOS C ONT R OL
Typical Input Circuit
VDD
Allowable Power Dissipation
2.5
22-P IN DIP , R JA = 56C /W 28-LE AD P LC C , R JA = 68C /W 14-P IN DIP , R JA = 73C /W
IN
P A C K A G E P OWE R DIS S IP A T ION (W)
2.0
24-LE AD S OIC , R JA = 85C /W
1.5
1.0
0.5
14-LE AD S OIC , R JA = 120C /W
0
25
50
75
100
125
150
A MB IE NT T E MP E R A T UR E ( C )
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
2
DABiC-5 Latched Sink Drivers
A6800/A6801
Datasheet 26180.110
ELECTRICAL CHARACTERISTICS1 Unless otherwise noted: TA = 25C, logic supply operating voltage Vdd = 3.0 V to 5.5 V
Vdd = 3.3 V Characteristic
Output Leakage Current Output Sustaining Voltage Collector-Emitter Saturation Voltage Input Voltage Input Resistance Logic Supply Current Clamp Diode Leakage Current Clamp Diode Forward Voltage Output Fall Time Output Rise Time
Vdd = 5 V Typ.
- - 0.8 0.9 1.0 - - - - 130 - - 80 100
Symbol
ICEX VCE(SUS) VCE(SAT) VIN(1) VIN(0) RIN IDD(1) IDD(0) Ir Vf tf tr
Test Conditions
VOUT = 50 V IOUT = 350 mA, L = 3 mH IOUT = 100 mA IOUT = 200 mA IOUT = 350 mA (See note 2)
Min.
- 35 - - - 2.2 - 50
Typ.
- - 0.8 0.9 1.0 - - - - 130 - - 80 100
Max. Min.
10 - 1.0 1.1 1.3 - 1.1 - 1.0 150 50 2.0 - - - 35 - - - 3.3 - 50 - - - - - -
Max.
10 - 1.0 1.1 1.3 - 1.7 - 1.0 150 50 2.0 - -
Units
A V V V V V V k mA A A V ns ns
One output on, IOUT = 100 mA All outputs off Vr = 50 V If = 350 mA VCC = 50 V, R1 = 500 , C1 30 pF VCC = 50 V, R1 = 500 , C1 30 pF
- - - - - -
1 2
Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to ensure a minimum logic 1. Because of limitations on package power dissipation, the simultaneous operation of multiple drivers can only be accomplished by reduction in duty cycle.
Truth Table
IN N 0 1 X X X X
S T R OB E 1 1 X X 0 0
CLE AR 0 0 1 X 0 0
OUT P UT
E NA B L E 0 0 X 1 0 0
OUT N t-1 X X X X ON OF F t OF F ON OF F OF F ON OF F
X = irrelevant t-1 = previous output s tate t = pres ent output s tate
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
3
DABiC-5 Latched Sink Drivers
Timing Requirements and Specifications
(Logic Levels are VDD and Ground)
A6800/A6801
Datasheet 26180.110
CLEAR
H
STROBE A OUTPUT ENABLE INN D OUTN E F G E C B C B A C B
G
I
Key A B C D E F G H I
Description Minimum data active time before Strobe enabled (Data Set-Up Time) Minimum data active time after Strobe disabled (Data Hold Time) Minimum Strobe pulse width Maximum time between Strobe activation and transition from output on to output off* Minimum time between Strobe activation and transition from output off to output on* Maximum time between Output Enable activation and transition from output on to output off* Minimum time between Output Enable activation and transition from output off to output on* Minimum Clear pulse width Minimum data pulse width
Time (ns) 25 25 50 500 500 500 500 50 100
*Conditions for output transition testing are: VDD = 50 V, VCC = 5 V, R1 = 500 , C1 30 pF.
NOTE: Information present at an input is transferred to its latch when the STROBE is high. A high CLEAR input will set all latches to the output off condition regardless of the data or STROBE input levels. A high
OUTPUT ENABLE will set all outputs to the off contdition, regardless of any other input conditions. When the OUTPUT ENABLE is low, the outputs depend on the state of their respective latches.
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
4
DABiC-5 Latched Sink Drivers
A6800SL
1
14
A6800/A6801
Datasheet 26180.110
A6801SA
CLEAR 1 2 3 4 5 6 7 8 9 10 11
LATCHES
22 VDD 21 20 19 18 17 16 15 14 13 12
OUTPUT ENABLE SUPPLY OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8 COMMON
A6800SA
CLEAR
STROBE
14
1
2 3
OUTPUT ENABLE
SUPPLY OUT 1 OUT 2 OUT 3 OUT 4
IN 1 IN 2 IN 3 IN 4 IN 5 IN 6 IN 7 IN 8 GROUND
STROBE IN 1 IN 2 IN 3 IN 4
GROUND
VDD 13
12
4 5 6 7
LATCHES
11 10 9 8
COMMON
Dwg. PP-014A
Note: The A6800SL (SOIC) and the A6800SA (DIP) are electrically identical and share a common terminal number assignment.
Dwg. PP-015
A6801SEP
STROBE 28 OUTPUT ENABLE 27 SUPPLY CLEAR
A6801SLW
CLEAR STROBE
26 NC
1 2 3 4 5
LATCHES
24 VDD 23 22 21 20 19 18 17 16 15 14 NC NC 13
OUTPUT ENABLE SUPPLY OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8 COMMON NO CONNECTION
Dwg. PP-015-1
4
3
2
1
V DD
ST
NC
NC
OE
IN1
25 24 23 OUT1 OUT 2 OUT 3
IN1 IN 2 IN 3 IN 4 IN 5
5 6 7
LATCHES
C
IN 2 IN 3 IN 4
6 7 8 9 10 11 12
8 9
22
OUT4
21 OUT 5 20 19 OUT 6 OUT7
IN5 IN 6 IN 7 IN 8
IN 6 10 IN 7 11
14 NC 13 NC 17 NC K 15 16
12
18
LAMP DIODE COMMON
GROUND
OUT8
GROUND NO CONNECTION
Dwg. PP-037
IN 8
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5
DABiC-5 Latched Sink Drivers
UNIPOLAR STEPPER-MOTOR DRIVE
+30 V
A6800/A6801
Datasheet 26180.110
TYPICAL APPLICATION
OUT P UT E NAB LE (AC T IV E LOW) C LE AR 1 S T R OB E IN 1 IN 2 IN 3 IN 4 3 4 5 6 7
LAT C HE S
14 V DD 13 12 11 10 9 8 V DD OUT 1 OUT 2 OUT 3 OUT 4
2
A6800S A
+30 V
Dwg. No. B -1537
UNIPOLAR WAVE DRIVE
UNIPOLAR 2-PHASE DRIVE
S T R OB E IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT 4
S T R OB E IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT 4
Dwg. G P -060
Dwg. G P -060-1
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
6
DABiC-5 Latched Sink Drivers
A6800SA
Dimensions in Inches (controlling dimensions)
0.014 0.008 14 8 0.430 0.280 0.240
MAX
A6800/A6801
Datasheet 26180.110
0.300
BSC
1
0.070 0.045
0.100 0.775 0.735
BSC
7
0.005
MIN
0.210
MAX
0.015
MIN
0.150 0.115 0.022 0.014
Dwg. MA-001-14A in
Dimensions in Millimeters (for reference only)
0.355 0.204 14 8 10.92 7.11 6.10
MAX
7.62
BSC
1
1.77 1.15
2.54 19.68 18.67
BSC
7
0.13
MIN
5.33
MAX
0.39
MIN
3.81 2.93 0.558 0.356
Dwg. MA-001-14A mm
NOTES: 1. Exact body and lead configuration at vendor's option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Lead thickness is measured at seating plane or below.
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
7
DABiC-5 Latched Sink Drivers
A6800SL
Dimensions in Inches (for reference only)
14 8 0.0098 0.0075 0.2440 0.2284
A6800/A6801
Datasheet 26180.110
0.1574 0.1497
0.050 0.016
0.020 0.013
1
2
3 0.3444 0.3367
0.050
BSC
0 TO 8
0.0688 0.0532 0.0040 MIN.
Dwg. MA-007-14 in
Dimensions in Millimeters (controlling dimensions)
14 8 0.25 0.19 6.20 5.80
4.00 3.80
1.27 0.40
0.51 0.33
1
2
3 8.75 8.55
1.27
BSC
0 TO 8
1.75 1.35 0.10 MIN.
NOTES: 1. 2. Exact body and lead configuration at vendor's option within limits shown. Lead spacing tolerance is non-cumulative.
Dwg. MA-007-14A mm
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
8
DABiC-5 Latched Sink Drivers
A6801SA
Dimensions in Inches (controlling dimensions)
22 12 0.015 0.008
A6800/A6801
Datasheet 26180.110
0.500 0.380 0.330
MAX
0.400
BSC
1
2 0.070 0.030
3 1.120 1.050
11 0.100
BSC
0.005
MIN
0.210
MAX
0.015
MIN
0.160 0.115 0.022 0.014
Dwg. MA-002-22 in
Dimensions in Millimeters (for reference only)
22 12 0.381 0.204
12.70 9.65 8.39
MAX
10.16
BSC
1
2 0.070 0.030
3 28.44 26.67
2.54
BSC
11
0.13
MIN
5.33
MAX
0.39
MIN
4.06 2.93 0.558 0.356
Dwg. MA-002-22 mm
NOTES: 1. Exact body and lead configuration at vendor's option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Lead thickness is measured at seating plane or below.
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
9
DABiC-5 Latched Sink Drivers
A6801SEP
Dimensions in Inches (controlling dimensions)
18 12
A6800/A6801
Datasheet 26180.110
0.013 0.021 0.219 0.191
19
11
0.026 0.032 0.456 0.450
BSC
INDEX AREA
0.050 0.219 0.191
0.495 0.485 25 5
26 0.020
MIN
28
1
4
0.165 0.180
0.456 0.450 0.495 0.485
Dwg. MA-005-28A in
Dimensions in Millimeters (for reference only)
18 12
0.331 0.533 5.56 4.85
19
11
1.27
BSC
0.812 0.661 11.58 11.43 12.57 12.32
INDEX AREA
5.56 4.85
25
5
26 0.51
MIN
28
1
4
4.57 4.20
11.582 11.430 12.57 12.32
Dwg. MA-005-28A mm
NOTES: 1. Exact body and lead configuration at vendor's option within limits shown. 2. Lead spacing tolerance is non-cumulative.
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
10
DABiC-5 Latched Sink Drivers
A6801SLW
Dimensions in Inches (for reference only)
24 13 0.0125 0.0091
A6800/A6801
Datasheet 26180.110
0.2992 0.2914
0.419 0.394
0.050 0.016 0.020 0.013 1 2 3 0.6141 0.5985 0.050
BSC
0 TO 8
0.0926 0.1043 0.0040 MIN.
Dwg. MA-008-24A in
Dimensions in Millimeters (controlling dimensions)
24 13 0.32 0.23
7.60 7.40
10.65 10.00
1.27 0.40 0.51 0.33 1 2 3 15.60 15.20 1.27
BSC
0 TO 8
2.65 2.35 0.10 MIN.
Dwg. MA-008-24A mm
NOTES: 1. 2.
Exact body and lead configuration at vendor's option within limits shown. Lead spacing tolerance is non-cumulative.
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
11
DABiC-5 Latched Sink Drivers
A6800/A6801
Datasheet 26180.110
The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright(c)2003, 2004, 2005 Allegro Microsystems, Inc.
www.allegromicro.com
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
12


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